The power management of embedded systems includes periodic sleep/wake cycles for the various integrated circuits (“ICs”) within the embedded systems. During the sleep/wake cycles, the various ICs transition between a low-power mode (sleep mode) and a normal-power mode (wake mode) to conserve power.
An embedded system utilizes a crystal oscillator (“XO”) to generate a reference clock signal for the various ICs included within the embedded system. During a low-power (sleep) mode, the crystal oscillator is powered off along with one or more of the various ICs. An external low-power oscillator (LPO) may be used as a clock reference within the embedded system during the low-power mode. While transitioning from a low-power mode to a normal-power mode, the crystal oscillator begins a warm-up sequence to warm-up the crystal oscillator.
To maintain the accuracy of the crystal oscillator, the embedded system does not enter the normal-power (wake) mode until the crystal oscillator has completed the warm-up sequence. The embedded system operates in the warm-up sequence for a time period that accounts for manufacturing tolerances of the crystal oscillator. That is, the length of the warm-up sequence for a particular crystal oscillator typically exceeds the actual warm-up time needed for that particular crystal oscillator. Consequently, the allotted time period in which the crystal oscillator may remain in a sleep state for a particular sequence is reduced to account for the compensated warm-up time, thereby limiting the potential power savings that occur during the sleep state.
The embodiments of the present disclosure will be described with reference to the accompanying drawings. The drawing in which an element first appears is typically indicated by the leftmost digit(s) in the corresponding reference number.